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Computational Lithography Rsearchers / Team Lead ( OPC / ORC / RET ) (2-10 yrs.)

Location:	Bangalore
Education:	BS /M.S/ Ph. D. in Electrical Engineering/Computer Science/Physics
No. of Positions:	3
Business Group:	Semiconductor Research Team ( Computational Lithograhy )
Industry:	Semiconductor Jobs
Approx Hiring time in weeks:	10

Target Project/Product Details

COMPUTATIONAL LITHOGRAPHY is a Resolution Enhancement Technique used, via computational software applications, to adjust design patterns on a chip and increase manufacturability.

Company Profile

The Trend Setting Product Company, Known through most of its recent history as the world's largest company .It has engineers and consultants in over 170 countries and has eight Research laboratories worldwide The client picks Bangalore for Sixth global Semiconductor Unit. Bangalore will be its sixth centre globally and first outside US and Europe. For nearly 30 years, our client has been at the forefront of technology innovation for semiconductor solutions.It has transformed semiconductor design and manufacturing with world-renowned research and development.

Skills

Key Skills:OPC,ORC,LITHO,RET,optical proximity correction,reticle enhancement technique
Must have Skills: Experience with verification tools such as Mentor Calibre SVRF, Cadence Assura, and/or Cadence Virtuoso. C / C++ coding and shell / iTCL / Perl scripting, object oriented programming a plus
Good to have Skills: candidates must possess a Degree (MS, PhD.) in Computer Science, Electrical Engineering, Physics, or related fields.

Roles and Responsibilities

Job Responsibilities : * Technical lead for a team of Engineers in the OPC/ORC areas. * Interact with integration and design teams to provide optical proximity corrections on design patterns and improve manufacturability. * Support current methods and develop new techniques (including scripts & tools) to address technology issues and keyword challenges. Required Skills : * Candidate should have knowledge in reticle enhancement techniques (RET). * Exposure to design technology co-optimization with exposure to 45nm, 32 nm technologies. * Ability to interface with lithography, integration and design teams. * Good interpersonal skills with technical depth required, experience with global teams a pig plus. Software skills requirements : Experience with verification tools such as Mentor Calibre SVRF, Cadence Assura, and/or Cadence Virtuoso. C / C++ coding and shell / iTCL / Perl scripting, object oriented programming a plus, Qualifications : candidates must possess a Degree (MS, PhD.) in Computer Science, Electrical Engineering, Physics, or related fields.

Contact Details

Company Name: Largest System & semiconductor & Technology Employer in World
Contact Email: leela@handigital.com